Single-supply op-amp gain stage: the resistor, bias and bypass network around the op amp on a board
A single-supply op-amp gain stage on a small board · level shift to mid-supply, resistor values from the transfer line, bypass capacitors and full-swing bandwidth
An amplifier circuit is the op amp plus everything that sets what it does on the board: gain and feedback resistors, a reference or bias that keeps the signal between the supply rails, coupling and decoupling capacitors, input protection and the connectors that bring the signal in and out. On a single supply the op amp's output cannot go below ground, so much of the design work is placing the signal inside the swing the part can deliver, picking standard resistor values that keep the transfer line close to the target, and keeping the stage stable with bypassing and layout.
Board-level single-supply voltage-gain stages built around an operational amplifier: inverting, non-inverting and level-shifting stages with their gain resistors, bias reference, decoupling and input protection, supplied as circuit boards or modules. The op-amp ICs themselves are covered on the Operational amplifier (op amp) page; linear class AB audio power modules are covered on the Linear (class AB) amplifier module page. Class-D audio boards, RF amplifiers and instrumentation-amplifier ICs are outside this page.
CNFX editorial research · Sources checked October 12, 2026 · 3 sources
A 10× inverting stage on one supply: why 100 mV in cannot give −1 V out, and how a 225 mV bias moves it to 1.475 V
Microchip's application note AN682 uses an inverting stage with R2 = 10 kΩ and R1 = 1 kΩ to show the single-supply trap: with no bias and 100 mV at the input, the ideal output is 1 V below ground, which violates the op amp's output swing, so the output goes as near to ground as it can. [1] Applying 225 mV to the non-inverting (VBIAS) input level-shifts the output up by 2.475 V, giving 2.475 V − 1 V = 1.475 V, and the note suggests designing the average output for VDD/2. [1]
Editorial calculation: the bias appears at the output multiplied by the non-inverting gain 1 + R2/R1 = 11, and 0.225 V × 11 = 2.475 V, which is the level shift AN682 states. AN682 shows the bias built as a rail splitter from a single amplifier with resistors and capacitors, and warns that a bias line that also feeds an A/D converter reference must hold its voltage under transient load or a conversion error may follow. [1]
The same note limits what 'rail-to-rail' buys: it says it is very rare for a single-supply amplifier to swing fully to the rails, that the output can stop 50 to 200 mV short of each rail and that the data sheet should be checked, and it advises against rail-to-rail input stages unless the circuit is a buffer or possibly an instrumentation configuration, since a stage with gain drives its output into the rail before the input runs out of range. [1]
02
From a transfer line to resistor values: 0.01–1 V in, 1–4.5 V out, VOUT = 3.5 VIN + 0.97 with 5% parts
TI's application report SLOA030A designs single-supply stages by writing the requirement as a straight line, VOUT = m·VIN + b, solving for m and b from two operating points, and letting the signs of m and b choose the circuit. [3] Its Case 1 example takes VIN = 0.01 V to 1 V into VOUT = 1 V to 4.5 V on a 5 V supply with a 10 kΩ load and 5% resistors, using VCC itself as the reference to save a reference source, which TI notes costs noise performance, accuracy and stability. [3]
The worked circuit carries two 0.01 µF decoupling capacitors, and TI warns that when VCC is the reference, part of the noise on VCC is multiplied by the circuit gain. [3] TI's procedure ends with building the circuit, taking data, testing with power removed while the input is live and with over- and under-range inputs, and adding protection; in its Case 4 example a germanium or Schottky diode with about 200 mV drop clamps the inverting input, and RG2 is split into two 51 kΩ resistors with a capacitor at their junction. [3]
Editorial calculation: m = 180/190 × 37/10 ≈ 3.505; b = 5 × 10/190 × 37/10 ≈ 0.974 V
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Bypass capacitor values, lead length and the 80 kHz full-swing limit of a 2.8 MHz part
AN682 attributes oscillation that makes no theoretical sense to a missing bypass capacitor. For single-supply amplifiers working from DC to megahertz it puts 1 µF at the supply pin, 0.1 µF for amplifiers with bandwidths up to tens of megahertz, and in its pitfalls list 0.1 µF at CMOS amplifiers plus 10 µF on the supply. [1] It also asks for short input leads, warns that perforated prototyping boards can cause noise and oscillation, and notes that a stage built for a gain of 10 may deliver less AC output than expected if the amplifier's bandwidth is too narrow. [1]
Small-signal bandwidth is not the limit for a stage that must swing the full supply. Microchip's AN723 gives the full-power bandwidth as fFP = SR / (π·Vp-p) and shows the MCP601 driving a 12-bit MCP3201 A/D converter on 5 V: its full-power bandwidth is 80 kHz, against a unity-gain bandwidth of 2.8 MHz, and at a 50 kHz sampling rate the stage has to carry a full-scale signal at 25 kHz, which AN723 says the 80 kHz figure exceeds by more than three times. [2] AN723 also defines a unity-gain-stable amplifier as one that does not oscillate as a follower; parts that are not unity-gain stable have an open-loop gain zero crossing below their gain-bandwidth product. [2]
Editorial note: when the board is a buffer or a low-gain stage, confirm the op amp is specified as unity-gain stable and able to drive the capacitive load on the output connector.
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Data for an amplifier-stage board enquiry
Paste it into your enquiry below or into an email to a maker, then replace every bracket.
Transfer: [input span; output span; inverting or non-inverting; or m and b]
Supply: [single supply voltage; reference source or supply-derived bias]
Signal: [bandwidth; full-scale output frequency; load resistance and capacitance]
Accuracy: [resistor tolerance; offset allowed at the output]
Protection: [input clamp; power-off input condition]
Board: [connectors; mounting; bypass and layout requirements]
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Compiled and source-reviewed by the CNFX editorial team.
Each manufacturer above links to the page on that company's own website where the product is listed, with the date we checked it. How we source and review
· Page last updated 13 October 2026
Buyer questions
Why does a single-supply inverting stage need a bias voltage?
Without it a positive input drives the output below ground. In Microchip's AN682 example a 10× stage with 100 mV in would need −1 V; a 225 mV bias shifts the output up 2.475 V to 1.475 V. [1]
How are the resistors chosen for a given input and output range?
TI's SLOA030A writes the requirement as VOUT = m·VIN + b, solves for m and b, then sizes the divider and gain resistors; its 0.01–1 V to 1–4.5 V example ends with 10 k/180 k and 10 k/27 k, giving VOUT = 3.5 VIN + 0.97. [3]
What bypass capacitor does an op-amp stage need?
AN682 puts 1 µF at single-supply amplifiers working up to megahertz, 0.1 µF for bandwidths up to tens of megahertz or at CMOS amplifiers, plus 10 µF on the supply. [1]
Can a 2.8 MHz op amp pass a full-swing 1 MHz signal?
Not necessarily. Microchip's AN723 shows the MCP601, with 2.8 MHz unity-gain bandwidth, has 80 kHz full-power bandwidth, set by fFP = SR / (π·Vp-p). [2]
Sources and what still needs a direct check
Sources checked 2026-10-12. Single-supply bias, bypassing and pitfalls come from Microchip's AN682; the transfer-line design method and worked resistor values from TI's SLOA030A; full-power bandwidth and unity-gain stability from Microchip's AN723. Values apply to the example circuits named.
