A conductive pathway through insulating layers in printed circuit boards for electrical connections between layers.
| Parameter | Typical range | Notes & selection driver |
|---|---|---|
| Diameter | 0.1-0.5 mm | |
| Resistance | < 50 mΩ | |
| Aspect Ratio | Up to 10:1 | |
| Current Capacity | 1-3 A | |
| Plating Thickness | 25-50 μm |
Ranges are indicative industry figures for RFQ preparation, not a supplier commitment. Confirm every value and standard with the legal manufacturer before ordering.
This component is used in the following industrial products
A practical evidence checklist for RFQ preparation and supplier evaluation.
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Manufacturer profiles associated with Via.
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Through-hole vias (connect all layers), blind vias (connect outer to inner layers), buried vias (connect only inner layers), and microvias (for high-density interconnect).
Thermal stress from coefficient of thermal expansion mismatch, plating voids, drill misalignment, and electrochemical migration.
Editorial classification, named public sources where available, and source-reviewed manufacturer records. See the editorial policy.