CAN bus controller (CAN / CAN FD controller IC)

01

ISO 11898 versions, CAN FD data rate and SPI clock of the TCAN4550

TI's TCAN4550 datasheet describes a CAN FD controller with an integrated CAN FD transceiver and SPI: the controller supports ISO 11898-1:2015 and Bosch M_CAN revision 3.2.1.1, the physical layer meets ISO 11898-2:2016, it is backward compatible with classic CAN, and it lists CAN FD data rates up to 5 Mbps with an SPI clock up to 18 MHz (its description also states transceiver support up to 8 Mbps). It adds CAN FD to processors that lack it or provides port expansion, with 3.3–5 V I/O logic support. [1]

It offers normal, standby, sleep and failsafe operating modes, wake-up by local wake (LWU) or the ISO 11898-2:2016 bus wake-up pattern, an internal dominant-state timeout and a time-out watchdog, for building automation, factory automation and industrial transportation. [1]

Editorial calculation: bit time is the inverse of data rate — 1 µs at 1 Mbps classic CAN and 200 ns in the CAN FD data phase at 5 Mbps — so a 5 Mbps data phase moves a 64-byte payload in a fraction of the time of eight classic 8-byte frames. [1]

Give the supplier the protocol (classic CAN, CAN FD) and standard versions, arbitration and data-phase rates, number of message buffers and filters, host interface and clock, whether a transceiver is integrated, I/O voltage, bus supply, fault and ESD requirements, low-power and wake-up needs, temperature range, qualification, package and quantity.

02

±42 V bus faults, ESD to IBEE and SAE J2962-2, and VSUP/VIO rails

The TCAN4550 lists ±42 V bus fault protection and ±12 V bus common-mode range, high-impedance bus and logic terminals when unpowered, glitch-free power-up and power-down, ±12,000 V HBM ESD on CANH and CANL and ±8,000 V contact discharge under IBEE CAN EMC and SAE J2962-2 test conditions. Recommended supply is 6–24 V on VSUP and 3.135–5.25 V on VIO, over −40 to 125 °C ambient, with a 42 V absolute maximum supply. [1]

It comes in a 20-pin VQFN of 4.50 × 3.50 mm and is offered as an automotive part; its thermal discussion considers a 60 Ω bus load (two terminations) held dominant at high ambient temperature. [1]

Editorial note: a controller with integrated transceiver saves board space, but check that its bus fault, common-mode and ESD ratings meet your cabling and EMC environment. [1]

03

Message RAM, filters and buffers inside the Bosch M_CAN core

The TCAN4550 builds on Bosch's M_CAN core [1], and Bosch's M_CAN user's manual (revision 3.3.1) sets that core's limits: conformity with ISO 11898-1:2015, CAN FD frames with up to 64 data bytes, up to 128 filters for 11-bit IDs and 64 for 29-bit IDs, two receive FIFOs of up to 64 messages each, up to 64 dedicated receive buffers, up to 32 dedicated transmit buffers, and up to 4352 32-bit words of message RAM. The data-phase bit rate depends on the CAN clock: with a 20 MHz CAN clock and the shortest bit time of 4 tq it is 5 Mbit/s. [4]

Editorial calculation: 1152 words for 64 receive elements is 18 words per element, the size for a 64-byte CAN FD message, and the 4352-word maximum is 17,408 bytes. The TCAN4550's 2K bytes of MRAM is 512 words, room for about 28 such 64-byte elements before any filters are allocated, so size FIFOs and buffers against the payload length your network uses. [4] [1]

04

MCP2515, MCP2518FD and TCAN4550 side by side

Three published stand-alone controllers with SPI show how the choices differ. Microchip's MCP2515 implements CAN 2.0B at 1 Mb/s with 0 to 8 data bytes, two receive buffers, six 29-bit filters, two masks and three transmit buffers, a 10 MHz SPI, 2.7–5.5 V supply, 5 mA active (typ.) and 1 µA standby in Sleep mode (typ.), in industrial (−40 to 85 °C) and extended (−40 to 125 °C) ranges, packaged as 18-lead PDIP/SOIC, 20-lead TSSOP or 20-lead QFN. [2]

The MCP2518FD datasheet lists mixed CAN 2.0B and CAN FD mode, 32-bit time stamps, programmable retransmission (unlimited, 3 attempts or disabled), maximum active current of 20 mA at 5.5 V with a 40 MHz CAN clock, 15 µA sleep current (typ.), 40, 20 or 4 MHz crystal options, SPI commands with CRC, ECC-protected RAM, AEC-Q100 qualification and SOIC14 or VDFN14 packages. [3] Table values for the TCAN4550 come from its datasheet. [1]

Editorial calculation: a 64-byte payload is 512 bits, which takes 512 / 20,000,000 = 25.6 µs to clock over a 20 MHz SPI and 512 / 5,000,000 = 102.4 µs on the bus in a 5 Mbps data phase; an 8-byte classic frame payload is 64 bits, 6.4 µs over a 10 MHz SPI against 64 µs at 1 Mb/s. Command bytes, headers and host software latency add to the SPI figure, so check total host load at your message rate. [2] [3]

State the protocol mode, arbitration and data rates, SPI clock and host MCU, message objects and filters needed, transceiver choice, supply rails, temperature grade, qualification and package.

05

Datasheet items to request before choosing a CAN controller IC

The three datasheets reviewed differ in data rate, message memory, supply rails and whether the transceiver is on the chip; ask any other supplier for the same items so the parts can be compared line by line. [1] [2] [3]

Ask for protocol compliance, arbitration and data rates, message RAM and filters, SPI timing, bus fault and ESD ratings, supply ranges, current by mode and qualification grade. [1]

06

Controller core, transceiver, SPI, protection and wake logic in a CAN FD chip

07

Bit rate, supply, current, buffers and package values from the three datasheets

Rows without a citation are board-level items that the IC datasheets do not rate.

08

Send the protocol, interface and bus data together

Paste it into your enquiry below or into an email to a maker, then replace every bracket.

Protocol: [CAN; CAN FD; ISO versions]
Rates: [kbps; Mbps]
Host: [SPI MHz; VIO]
Transceiver: [integrated; external]
Bus: [fault V; CM range; ESD]
Power/modes: [VSUP; sleep; wake]
Temp/grade/package: [°C; AEC; type]
Quantity: [units]

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