Difference amplifiers and fully differential amplifiers · gain set by resistor ratios, common-mode rejection limited by resistor matching, input impedance and source loading, Vocm output common-mode control for differential ADCs, doubled output swing and reduced even-order distortion
A differential amplifier amplifies the difference between two input voltages while rejecting the voltage shared by both; in practice it is bought either as a difference amplifier, an op amp with a matched resistor network, discrete or integrated, or as a fully differential amplifier with two outputs and a separate output common-mode input for driving differential ADCs. Ask three things first: what common-mode voltage must be rejected and how well, what source impedance and input range the inputs see, and whether the next stage needs a single-ended or a differential output.
Difference amplifiers (integrated or op amp with matched resistors) and fully differential amplifiers for measurement, current sensing and ADC driving. General-purpose operational amplifiers (a separate product page), instrumentation amplifiers, current-sense amplifiers sold as such, and transimpedance amplifiers (a separate product page) are outside this page except where compared.
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01
Texas Instruments' difference amplifier (subtractor) circuit note explains that the circuit outputs the difference of two inputs, with input impedance set by the resistor network, so the sources should be low-impedance; difference amplifiers amplify differential signals and reject common-mode voltage, and their common-mode rejection ratio (CMRR) is dominated by resistor tolerance. With R1 = R2 and R3 = R4 the output is (Vi2 − Vi1) × R3/R1 + Vref. It estimates CMRR as about 20 log₁₀[(1 + G)/(α × ε)], with α = 4 for minimum (worst-case) and 0.33 for typical CMRR, where ε is resistor tolerance; its table gives, for G = 1, 74 dB minimum with 0.01% resistors, 54 dB with 0.1%, 40 dB with 0.5%, 34 dB with 1% and 20 dB with 5%, with higher CMRR at G = 2. [1]
Editorial calculation: for G = 1 and 0.1% resistors, minimum CMRR ≈ 20 log₁₀[2 / (4 × 0.001)] = 20 log₁₀ 500 ≈ 54.0 dB and typical ≈ 20 log₁₀[2 / (0.33 × 0.001)] ≈ 75.6 dB, matching the note's table. A 10 V common-mode swing at 54 dB (a ratio of about 500) still produces about 10 / 500 = 20 mV of error referred to the input, so tighter resistor matching, whether discrete or integrated, is worth comparing. The 10 V figure is an assumed example.
Give the supplier the signal and common-mode voltage ranges, required gain and accuracy, CMRR at DC and at the frequencies of interest, source impedance, supply voltage(s), output type (single-ended or differential), output common-mode needs for the ADC, bandwidth and slew rate, noise, input protection, package, temperature range and automotive qualification if needed.
02
TI's fully-differential amplifier report explains that differential signalling resists external noise and is used in high-speed data acquisition, where ADC inputs are differential and a differential amplifier is needed to drive them. In a fully differential amplifier the output is differential and its common-mode voltage is set independently by the Vocm input: an error amplifier samples the output common-mode voltage and adjusts internal feedback to hold it at the Vocm pin voltage. Because the two outputs move in opposite phase, output swing doubles compared with a single-ended output on the same rails; even-order terms cancel in the differential output, and lab tests of one part at 1 MHz showed the second harmonic about 6 dB lower measured differentially, with the third harmonic unchanged. [2]
Editorial note: set Vocm to the ADC's required input common-mode voltage, and check the amplifier's input and output common-mode ranges on your supply before choosing gain resistors.
03
SGMICRO's SGM8473 is a difference amplifier with integrated resistors fixing the gain at 0.2 V/V (SGM8473A1) or 0.6 V/V (SGM8473A3), high input impedance, rail-to-rail output and single or dual supplies of 4.6–36 V or ±2.3–±18 V, in SOIC-8 for −40 to +125 °C. Its maker lists industrial systems and PLCs among applications. [3]
Because the resistors are on chip, gain accuracy and common-mode rejection depend on the maker's internal matching rather than on discrete resistors, the matching issue the TI subtractor note explains for the discrete circuit; the maker describes the part as a high-voltage difference amplifier with sub-unity gain options. [3] [1]
Editorial calculation: 72 dB CMRR is a ratio of about 1/3,981, so 10 V of common-mode voltage appears as about 2.5 mV of error referred to the input, larger than the 1.2–1.5 mV maximum offset.
| SGM8473 (SGMICRO) | SGM8473A1 (0.2 V/V) | SGM8473A3 (0.6 V/V) |
|---|---|---|
| Input offset voltage, max | 1.5 mV | 1.2 mV |
| Voltage noise at 1 kHz | 120 nV/√Hz | 80 nV/√Hz |
| 0.1–10 Hz noise | 9 µVp-p | 6 µVp-p |
| Non-linearity, max | 70 ppm | 70 ppm |
| CMRR, typ | 72 dB | 72 dB |
| Input bias current, typ | 15 nA | 15 nA |
| Bandwidth / settling to 0.1% | 1.3 MHz / 10 µs | 1.3 MHz / 10 µs |
| Supply current, typ | 1.3 mA | 1.3 mA |
State the differential and common-mode input ranges, the gain needed to fit your ADC, supply rails and bandwidth, and ask for CMRR versus frequency, gain error and drift of the integrated resistors.
04
Vishay's MPM product page describes a molded SOT-23 thin film resistor divider network, a matched pair of resistors in one package, and lists three figures that decide how well a discrete difference amplifier rejects common-mode voltage: ratio tolerances down to ±0.01%, TCR tracking of ±2 ppm, and long-term ratio stability of ΔR ±0.015% after 2,000 h at +70 °C. [4]
TI's subtractor note shows that CMRR in the discrete circuit is set by resistor matching. Editorial calculation: applying the note's minimum-CMRR expression for G = 1 to a 0.01% ratio tolerance gives 20 log₁₀[2 ÷ (4 × 0.0001)] ≈ 74 dB, the figure TI's table gives for 0.01% resistors, against about 54 dB for 0.1% parts. [1] [4]
Matching at delivery is not the whole budget. Editorial calculation, assuming the ±2 ppm tracking figure is per °C: over a 50 °C temperature swing the ratio can move by up to 100 ppm, or 0.01%, as much as the initial tolerance, and the listed 2,000 h stability of ±0.015% adds a further shift. If both effects added to a 0.01% initial error, the worst-case match of about 0.035% would give 20 log₁₀[2 ÷ (4 × 0.00035)] ≈ 63 dB minimum CMRR. A difference amplifier needs two matched ratios, so ask the supplier how ratio tolerance is specified between the two pairs, and compare the result with the 72 dB typical CMRR of an integrated part such as the SGM8473. [4] [1] [3]
| Matching figure | Published value | Editorial calculation: effect |
|---|---|---|
| Ratio tolerance | To ±0.01%. [4] | ≈74 dB minimum CMRR at G = 1. [1] |
| TCR tracking | ±2 ppm. [4] | Up to 0.01% over 50 °C (if per °C). |
| Long-term ratio stability | ±0.015%, 2,000 h, +70 °C. [4] | Adds to initial mismatch. |
| Worst case of the three added | — | ≈0.035%, ≈63 dB minimum CMRR. |
05
Suppliers linked to this page list differential amplifiers; each card links to the page reviewed.
The listing reviewed covers difference amplifiers alongside operational, instrumentation and current-sense amplifiers. Ask for CMRR versus frequency, gain error, common-mode range and package options.
06
This is a functional reference built from the sources cited; it is not one maker's specification.
| Function | Role | Fix in the order |
|---|---|---|
| Resistor network | Sets gain; matching sets CMRR. [1] | Gain and matching. |
| Reference input (Vref) | Offsets the output. [1] | Reference level. |
| Differential outputs | Double swing; cancel even orders. [2] | Single-ended or differential. |
| Vocm input | Sets output common-mode. [2] | Vocm range for ADC. |
| Op amp core | Bandwidth, slew, swing. [1] | GBP; slew rate. |
07
A differential amplifier quotation needs values for your signal chain. The table explains each field, gives published values where a reviewed source states them, and says what to obtain from the supplier.
| Field | What it means and published values | Ask the supplier for |
|---|---|---|
| CMRR | Example: 54 dB min at 0.1%, G = 1 (discrete). [1] | CMRR vs frequency. |
| Gain | G = R3/R1 for matched pairs. [1] | Gain options and error. |
| Input impedance | Set by resistors; use low-impedance sources. [1] | Input resistance. |
| Output type | Single-ended or fully differential with Vocm. [2] | Output configuration. |
| Distortion | Even-order reduced differentially (≈6 dB, 2nd harmonic example). [2] | HD2/HD3 data. |
| Bandwidth / slew | Noise gain × GBP; slew limits large signals. [1] | Values at your gain. |
| Integrated gain and CMRR | Fixed 0.2 or 0.6 V/V gain; 72 dB CMRR typ; 4.6–36 V supply in one integrated difference amplifier. [3] | Gain options, CMRR, supply range. |
08
Paste it into your enquiry below or into an email to a maker, then replace every bracket.
Signal: [differential range; bandwidth] Common mode: [range; frequency; CMRR target] Gain: [value; accuracy] Source/load: [impedances; ADC input] Output: [single-ended or differential; Vocm] Supply: [rails] Package: [type; temperature; grade]
These companies list differential amplifiers.
Lists difference amplifiers within its operational, instrumentation and current-sense amplifier range.
Product scope checked 2026-10-11
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TI's design note says CMRR is dominated by resistor tolerance; for G = 1 it ranges from about 74 dB minimum with 0.01% resistors to 20 dB with 5%. [1]
It sets the output common-mode voltage independently of the differential signal, held by an internal error amplifier. [2]
TI notes they double the output swing for a given supply and reduce even-order harmonic distortion. [2]
SGMICRO's SGM8473, for example, lists 72 dB typical CMRR with fixed gains of 0.2 or 0.6 V/V and supplies up to 36 V. [3]
Sources checked 2026-10-12. Two sources are Texas Instruments application documents, and SGMICRO and Vishay pages describe their own parts; their circuit values are examples, not limits for other makers' parts.
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