Low-dropout linear regulators · Dropout and headroom, efficiency and power dissipation against package thermal resistance, quiescent current, noise and PSRR
A low-dropout regulator (LDO) is a linear regulator that holds a fixed or set output voltage with only a small difference between input and output, by dropping the excess voltage across a pass transistor. Settle three things before choosing one: the output current and the headroom available (input minus output) against dropout, the power the package must dissipate at your worst-case input, and the quiescent current, noise, PSRR and accuracy the load needs.
Linear LDO regulator ICs and modules for board-level supply rails. Switching (buck/boost) regulators, standard (non-LDO) linear regulators, voltage references and PMICs are outside this page.
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01
TI's application report on LDO terms defines dropout voltage as the input-to-output differential at which the circuit stops regulating; in dropout a PMOS pass element behaves as a resistor, so dropout ≈ Io × Ron. It gives efficiency as Io·Vo ÷ ((Io + Iq)·Vi) × 100, notes that power dissipation is (Vi − Vo) × Io, and works an example in which a 3.3 V LDO at 100 mA with 17 mA quiescent current is 73.3% efficient from 4.5 V but 82.5% from 4 V. [1]
The same report says the maximum allowable dissipation is PD(max) = (TJmax − TA) ÷ RθJA, and that the actual dissipation must not exceed it. [1] TI's TPS7A20 datasheet lists junction-to-ambient thermal resistance of 187.1 °C/W in SOT-23, 166.1 °C/W in X2SON and about 200 °C/W in the DSBGA packages, an operating junction range of −40 to 125 °C and internal thermal shutdown. [2]
Editorial calculation: dropping 5 V to 3.3 V at 300 mA dissipates 0.51 W; at 187 °C/W (SOT-23) that is about a 95 °C rise, taking the junction to about 120 °C at 25 °C ambient — at the edge of the 125 °C limit. From a 3.6 V input the same load dissipates 0.09 W and rises about 17 °C, and efficiency improves from about 66% to 92% (ignoring quiescent current). [1] [2]
Give the supplier the input voltage range, output voltage and tolerance, maximum and minimum load current, required dropout at full load, ambient temperature and board copper area, quiescent and shutdown current limits, noise and PSRR at the frequencies that matter, enable and soft-start needs, output capacitor type and value, package and quantity.
02
The TPS7A20 datasheet lists a 300 mA LDO with 1.6–6.0 V input and 0.8–5.5 V output, ±1.5% maximum output tolerance over load, line and temperature, dropout of 140 mV maximum at 300 mA for a 3.3 V output (145 mV in SOT-23), quiescent current of 6.5 µA, shutdown current of 0.07 µA typical, output noise of 7 µVrms without a noise-bypass capacitor, PSRR of 95 dB at 1 kHz, stability with a 1 µF minimum ceramic output capacitor, internal soft-start, foldback current limit and a smart enable pulldown. [2]
TI's report defines quiescent (ground) current as the difference between input and output currents, and covers standby current, transient response, line and load regulation, PSRR, output noise and accuracy as the remaining selection terms. [1]
TI positions the TPS7A20's low quiescent current for battery-powered applications and its low noise and high PSRR for RF and other sensitive analogue circuits. [2] Editorial note: read PSRR at the switching frequency of the upstream converter, not only at 1 kHz.
A linked supplier lists low-dropout regulators among its power-management ICs. [3]
03
Diodes Incorporated's AP2112 datasheet (DS39724 Rev. 2-2) describes a CMOS LDO guaranteeing 600 mA minimum continuous load current, with fixed outputs of 1.2, 1.8, 2.5, 2.6 or 3.3 V at ±1.5% accuracy. It lists a typical dropout of 250 mV at 600 mA for the 3.3 V version, 55 µA typical quiescent current and 0.01 µA standby current, load regulation of 0.2%/A and line regulation of 0.02%/V typical, 50 µVrms output noise from 10 Hz to 100 kHz, PSRR of 65 dB at 100 Hz and 1 kHz, foldback short-circuit current of 50 mA, thermal shutdown, an enable pin with a 60 Ω output discharge when disabled, and stability with a 1.0 µF ceramic, tantalum or aluminium capacitor. Recommended input is 2.5–6.0 V (6.5 V absolute maximum) at −40 to +85 °C ambient, and junction-to-ambient thermal resistance without a heat sink is 184 °C/W for SOT25, 120 °C/W for SOT89-5 and 114 °C/W for SO-8. [4]
Editorial calculation: dropping 5 V to 3.3 V at the full 600 mA dissipates about 1.0 W. Using PD(max) = (TJmax − TA) ÷ RθJA from TI's report with an assumed 125 °C junction limit at 25 °C ambient, a SOT25 package can shed about 0.54 W, or about 320 mA at a 1.7 V drop, and SO-8 about 0.88 W, or about 515 mA; so the 600 mA rating needs a smaller input-output difference, a lower ambient or more copper. Ask suppliers for θJA on your board layout, not only the package figure. [4] [1]
04
Suppliers linked to this page list LDO regulators; each card links to the page reviewed.
The listing reviewed offers LDO regulators within a broad power-management range; ask for the datasheet with dropout at your load, thermal resistance of the package, quiescent current, noise and PSRR curves.
05
This is a functional reference built from the sources cited; it is not one maker's specification.
| Block | Role | Fix in the order |
|---|---|---|
| Pass transistor | Sets dropout (≈ Io·Ron). [1] | Dropout at load. |
| Reference and error amplifier | Accuracy, PSRR, noise. [2] [1] | Tolerance; noise. |
| Current limit | Protects under overload. [2] | Limit; foldback. |
| Thermal shutdown | Protects at high TJ. [2] | Threshold. |
| Enable and soft-start | Sequencing and inrush. [2] | Enable logic. |
| Package | Thermal resistance. [2] [1] | Package; θJA. |
06
An LDO quotation needs values for your rail. The table explains each field, gives published values where a reviewed source states them, and says what to obtain from the supplier.
| Field | What it means and published values | Ask the supplier for |
|---|---|---|
| Output Voltage (V) | Example range 0.8–5.5 V; ±1.5% max. [2] | Voltage; tolerance. |
| Output Current (A) | Example 0.3 A; 0.6 A. [2] [4] | Continuous current. |
| Dropout Voltage (V) | Example 0.14 V max at 300 mA. [2] | At your load and temperature. |
| Line Regulation (%/V) | Output change with input; e.g. 0.02%/V typ. [1] [4] | Value. |
| Load Regulation (%) | Output change with load; e.g. 0.2%/A typ. [1] [4] | Value. |
| Quiescent Current (mA) | Example 0.0065 mA (6.5 µA). [2] | At no load and full load. |
| Operating Temperature (°C) | TJ −40 to 125 °C example. [2] | Range. |
| Input Voltage Range (V) | Example 1.6–6.0 V. [2] | Range. |
| Output Noise (µVrms) | Example 7 µVrms. [2] | Bandwidth stated. |
| Power Supply Rejection Ratio (dB) | Example 95 dB at 1 kHz. [2] | PSRR curve. |
| Package Type | SOT-23, X2SON, DSBGA with θJA 166–201 °C/W. [2] | Package; θJA. |
07
Paste it into your enquiry below or into an email to a maker, then replace every bracket.
Input: [voltage range] Output: [voltage; tolerance] Load: [max and min current] Dropout: [required at full load] Thermal: [ambient; copper area; package] Iq: [active; shutdown] Noise/PSRR: [frequencies of interest] Quantity: [annual]
These companies list LDO regulators.
Lists low-dropout regulators among its power-management ICs.
Product scope checked 2026-10-11
Explore company information and manufacturing capabilities, then discuss the scope of your project with a relevant supplier.
TI defines it as the input–output difference at which the regulator stops regulating. [1]
TI gives P = (Vi − Vo) × Io and PD(max) = (TJmax − TA) ÷ RθJA. [1]
TI gives efficiency as Io·Vo ÷ ((Io + Iq)·Vi); its example rises from 73.3% at 4.5 V input to 82.5% at 4 V. [1]
TI's TPS7A20 lists 6.5 µA quiescent current. [2]
Sources checked 2026-10-12. Texas Instruments publishes an LDO terms application report and a TPS7A20 datasheet; Silergy is a linked supplier.
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