Transistor array IC

01

Matched low-noise arrays: gain, noise, matching and speed

THAT Corporation's 300 series data sheet describes large-geometry, four-transistor monolithic arrays: the 300 with four matched NPN transistors, hFE 100 (typ.), with the 300A and 300B selected for minimum hFE of 150 and 300; the 320 with four matched PNP transistors, hFE 75 (typ.); and the 340 with two matched PNP and two matched NPN. [1] It lists voltage noise of 0.75 nV/√Hz for PNP and 0.8 nV/√Hz for NPN devices, transition frequency fT of 350 MHz (NPN) and 325 MHz (PNP), 500 µV matching between devices and 36 V VCEO. [1]

The data sheet explains that the transistors are dielectrically isolated: each is insulated from the others by a layer of oxide rather than by reverse-biased PN junctions, giving crosstalk and DC isolation similar to discrete transistors; base-spreading resistance is 25 Ω (typ.) for the PNP devices and 30 Ω (typ.) for the low-gain NPNs. [1] Listed applications include low-noise front ends, microphone preamplifiers, log/antilog amplifiers, current sources, current mirrors and multipliers. [1]

Give the supplier the function (matched pair or quad, or driver), transistor polarity and count, minimum current gain, voltage noise, matching limit, transition frequency, VCEO, collector current per transistor and per package, input logic level for driver arrays, clamp diodes, operating temperature range and package.

02

Darlington driver arrays: current, voltage, clamps and inputs

Texas Instruments' ULN200x data sheet describes high-voltage, high-current Darlington transistor arrays of seven NPN Darlington pairs with clamp diodes whose cathodes share one COM pin, for switching inductive loads. Each pair is rated 500 mA collector current with 50 V outputs, and pairs can be paralleled for higher current. Applications include relay, stepper and brushed DC motor, lamp, display and line drivers and logic buffers. [2]

Input variants differ by series base resistor: the ULx2003A has 2.7 kΩ per pair for direct operation from TTL or 5 V CMOS, the ULx2004A has 10.5 kΩ for CMOS supplied at 6 V to 15 V, and the ULN2002A is designed for 14 V to 25 V PMOS devices; TI points to separate 100 V devices for higher voltage. Listed packages include SOIC-16 (9.90 × 3.91 mm), PDIP-16 (19.30 × 6.35 mm), SOP-16, TSSOP-16 (5.00 × 4.40 mm) and SOT-16 (4.20 × 2.00 mm). [2]

Editorial note: the 500 mA rating applies to a single output; when more than one output conducts together, check the data sheet's limits for total package current and dissipation at your duty cycle and temperature.

03

Check package dissipation before driving all channels at once

Texas Instruments' ULN2803C data sheet describes an eight-channel version: eight NPN Darlington pairs, 50 V and 500 mA per output, in a 20-pin SOIC measuring 12.80 mm × 10.3 mm. It lists the maximum collector-emitter saturation voltage as 1.1 V at 100 mA, 1.3 V at 200 mA and 1.6 V at 350 mA, a total substrate-terminal current limit of −2.5 A, and a junction-to-ambient thermal resistance of 75.4 °C/W. TI's design procedure sums on-chip dissipation over the channels active together, PD = Σ VOL × IL, and caps it at (TJ(max) − TA) / θJA, recommending a die junction temperature below 125 °C. [3]

Editorial calculation from these figures: at 25 °C ambient and a 125 °C junction limit, the allowable dissipation is (125 − 25) / 75.4 ≈ 1.33 W. Eight channels each sinking 200 mA at the 1.3 V maximum saturation voltage dissipate 8 × 1.3 × 0.2 = 2.08 W, above that limit; five such channels (1.30 W) fit. Ask the supplier for the saturation-voltage table and thermal resistance of the exact package, and size the channel count to your worst-case ambient. [3]

The same data sheet gives handling and input figures: ESD ratings of ±2000 V human body model and ±500 V charged device model, input current of 0.93 mA (typ.) and 1.35 mA maximum at 3.85 V input, clamp diode forward voltage of 1.3 V (typ.) and 2 V maximum at 350 mA, and collector cutoff current of 50 µA maximum at 50 V. [3]

04

For RF stages, trade voltage and current headroom for fT

Renesas' FN3076 data sheet (Rev. 16.00, January 2019) covers a third kind of array: ultra high frequency arrays of five dielectrically isolated transistors on one substrate, all NPN (HFA3046, HFA3127), all PNP (HFA3128) or NPN-PNP (HFA3096), for VHF/UHF amplifiers and mixers, IF converters and synchronous detectors. Renesas says monolithic construction gives close electrical and thermal matching of the five transistors, and lists collector-to-collector leakage below 1 pA. [4]

The limits are low: continuous collector current of 18.5 mA at TJ = +150 °C, 34 mA at +125 °C or 37 mA at +110 °C, 65 mA peak and 0.15 W per transistor. Thermal resistance θJA is 120 °C/W in the 14-lead SOIC, 115 °C/W in the 16-lead SOIC and 57 °C/W in the 3 × 3 mm QFN, over −55 °C to +125 °C; the HFA3128 is marked no longer available. [4]

Editorial calculation: against the THAT 300's 350 MHz NPN fT and 36 V VCEO, the HFA3046 family offers 8 GHz ÷ 350 MHz ≈ 23 times the fT at 8 V ÷ 36 V ≈ 0.22 of the minimum collector-emitter voltage. [4] [1]

05

Building blocks inside matched and driver arrays

Isolation and input resistors are the rows that separate the two families: dielectric isolation matters for matched arrays, the series base resistor for Darlington drivers. [1] [2]

06

Which rows apply to matched arrays and which to drivers

The rows from current gain to transition frequency apply to matched arrays and use THAT 300 figures; collector current and input compatibility apply to Darlington drivers and use the ULN200x data sheet. [1] [2]

07

Send the circuit function and ratings together

Paste it into your enquiry below or into an email to a maker, then replace every bracket.

Function: [matched array or driver array]
Transistors: [polarity; count]
Analogue: [hFE; noise; matching; fT]
Driver: [load current; voltage; clamp diodes; input logic]
Thermal: [outputs on together; duty; temperature]
Package: [type; footprint]
Volume: [quantity; lifetime]

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