MOSFET, IGBT and SiC gate drivers · Isolation rating and CMTI, peak source and sink current, propagation delay and matching, UVLO, and gate-drive power
A gate driver is the circuit — an IC or a discrete stage — that turns a controller's logic signal into the current pulses needed to charge and discharge the gate of a power MOSFET, IGBT or SiC transistor quickly. Settle three things before choosing one: whether the driver must be isolated (and to what voltage) or can be ground-referenced, the peak current and timing needed for the transistor's gate charge and switching frequency, and the supply, under-voltage lockout and dissipation limits it must work within.
Low-side, high-side, half-bridge and isolated gate-driver ICs and modules for MOSFETs, IGBTs and SiC/GaN transistors in power supplies, motor drives and inverters. Power transistors and modules themselves, motor controllers, optocouplers sold for logic isolation and complete inverter boards are outside this page; IGBT modules have their own page.
01
Texas Instruments' datasheet for its UCC21520 describes an isolated dual-channel gate driver with 4 A peak source and 6 A peak sink current, designed to drive power MOSFETs, IGBTs and SiC MOSFETs up to 5 MHz. The input is isolated from the outputs by a 5.7 kV rms reinforced barrier (1 minute per UL 1577; 8,000 V peak reinforced per DIN EN IEC 60747-17 planned) with common-mode transient immunity above 125 V/ns. Functional isolation between the two output channels allows a working voltage up to 1,500 V DC. [1]
The datasheet gives external clearance and creepage of more than 8 mm and a distance through insulation over 17 µm, and notes that creepage and clearance must follow the end equipment's isolation standard and that PCB pads must not reduce them. Each channel can be configured as low-side, high-side or half-bridge with programmable dead time, and primary-side logic failures force both outputs low. [1]
TI's application report on MOSFET and IGBT gate drive circuits explains that the required gate charge has to pass through the driver output impedance, the external gate resistor and the internal gate resistance in every cycle, that “with low value gate resistors (< 5 Ω) most gate drive losses are dissipated in the driver”, and that for PWM controllers “Very few integrated circuits offer more than 1-A peak gate drive capability” — which limits the MOSFET size they can drive directly. [2]
Editorial note: isolated drivers are needed where the driver's reference moves with the switch node, for example in high-side switches and bridges on high-voltage buses; specify the isolation rating and CMTI against the bus voltage and switching edge rate of the converter.
Give the supplier the power device type (MOSFET, IGBT, SiC, GaN) and its gate charge, bus voltage and topology, isolation required (functional, basic, reinforced) and certifications, peak source/sink current, output supply voltage, switching frequency, propagation-delay and matching limits, UVLO level, package and creepage, temperature range and quantity.
02
The UCC21520 datasheet lists propagation delay of 26–45 ns (33 ns typ.), channel-to-channel delay matching within 6.5 ns (5 ns from −10 °C to 150 °C junction), minimum pulse width 20 ns, pulse-width distortion of 6 ns maximum, and output rise/fall times of 6 ns and 7 ns (typ.; 16 ns and 12 ns maximum) into 1.8 nF. Output supply VDD runs up to 25 V, with UVLO versions rising at 6.0 V (typ.) for the 5 V option or 8.5 V (typ.) for the 8 V option; the input side accepts 3–18 V. Maximum dissipation is 450 mW per driver side and 50 mW on the input side. [1]
TI's application report gives the gate-charge loss as P_GATE = V_DRV × Q_G × f_DRV, notes that Q_G × f_DRV is the average bias current the driver must supply, and says this power is dissipated in the gate-drive path regardless of how fast the charge is delivered. [2]
Editorial calculation: driving a transistor with 100 nC of gate charge at 15 V and 100 kHz takes about 0.15 W (15 × 100 × 10⁻⁹ × 100,000) per channel, within the UCC21520's 450 mW per driver side; at 500 kHz the same device would need about 0.75 W, above it. Check the gate charge at your drive voltage and the frequency before choosing the package. [2] [1]
Linked suppliers list isolated gate drivers, three-phase gate-driver ICs and motor and gate drivers within broader analogue and power IC ranges. [3] [4]
03
The listings reviewed cover isolated gate drivers, three-phase and half-bridge drivers and motor-driver families from Chinese analogue and power IC makers; ask each for the datasheet with isolation certificates, peak current, propagation delay, UVLO and dissipation ratings.
04
In the UCC21520 the reinforced barrier separates the 3–18 V input side from two output channels, which are themselves functionally isolated for a working voltage up to 1,500 V DC. [1]
| Block | Role | Fix in the order |
|---|---|---|
| Input stage | Logic interface, 3–18 V. [1] | Input levels. |
| Isolation barrier | Withstand and CMTI. [1] | Rating; certificates. |
| Output stage | Peak source and sink current. [1] [2] | Amps; supply. |
| UVLO | Holds outputs off at low supply. [1] | Threshold. |
| Dead-time and disable | Prevents shoot-through. [1] | Programmable or fixed. |
| Package | Creepage and heat. [1] | Package; creepage. |
05
Every published value below is the UCC21520's, so read it as the form each field takes; input thresholds have no value here and have to come from the supplier. [1]
| Field | What it means and published values | Ask the supplier for |
|---|---|---|
| Output Peak Current (A) | Example: 4 A source, 6 A sink. [1] | Source and sink. |
| Supply Voltage (V) | Output VDD up to 25 V; input 3–18 V. [1] | Ranges. |
| Switching Frequency (kHz) | Up to 5 MHz rated (example). [1] | Limit at your load. |
| Propagation Delay (ns) | 26–45 (33 typ); matching ≤6.5, ≤5 from −10 to 150 °C junction. [1] | Delay and matching. |
| Output Rise/Fall Time (ns) | 6/7 typ into 1.8 nF. [1] | At your load. |
| Operating Temperature Range (°C) | Junction −40 to +150. [1] | Range. |
| Isolation Voltage (Vrms) | 5.7 kV rms, 1 min (UL 1577). [1] | Rating; certificate. |
| Input Threshold Voltage (V) | Logic thresholds. | Values. |
| Under-Voltage Lockout (UVLO) (V) | 6.0 or 8.5 V typ rising. [1] | Threshold. |
| Package Type | SOIC-16 wide body example. [1] | Package. |
| Creepage Distance (mm) | >8 mm external. [1] | Creepage; clearance. |
06
Paste it into your enquiry below or into an email to a maker, then replace every bracket.
Device: [MOSFET; IGBT; SiC; GaN; gate charge] Topology: [low-side; high-side; half-bridge; bus voltage] Isolation: [none; functional; basic; reinforced; certificates] Drive: [peak source/sink; VDD] Timing: [frequency; delay; matching; dead time] Protection: [UVLO; disable; fault] Package: [type; creepage] Volume: [annual quantity]
5 companies list this product among what they make. Company figures are quoted from each company's own website; every card states where the relationship came from.
Lists isolated gate drivers within its digital isolator range.
Product scope checked 2026-10-11
Lists motor and gate drivers among its analogue ICs.
Product scope checked 2026-10-11
Lists gate drivers among its power management ICs.
Product scope checked 2026-10-11
Lists gate driver products.
Product scope checked 2026-10-11
Lists three-phase gate driver ICs among its power ICs.
Product scope checked 2026-10-11
Explore company information and manufacturing capabilities, then discuss the scope of your project with a relevant supplier.
TI's UCC21520 provides 4 A source and 6 A sink; TI notes few PWM controllers exceed 1 A gate drive. [1] [2]
TI gives P_GATE = V_DRV × Q_G × f_DRV. [2]
TI's UCC21520 lists 5.7 kV rms for 1 minute per UL 1577 and CMTI above 125 V/ns. [1]
TI's UCC21520 has under-voltage lockout on all supply pins, with 5 V and 8 V output options. [1]
Sources checked 2026-10-12. Texas Instruments publishes an isolated gate-driver datasheet and a gate-drive design application report; MATCHINGIC and SG Micro are linked suppliers.
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