Encryption and security chips for communication equipment, smart cards, IoT and payment devices · algorithms (AES-128/192/256 and others), FIPS 140-3 security levels and CMVP validation, FIPS 140-2 transition, physical and non-invasive protection, key storage, interfaces and packages
An encryption chip is an integrated circuit that performs cryptographic operations — encrypting and decrypting data, signing and verifying, and generating and protecting keys — inside communication equipment, smart cards, payment terminals, IoT devices and storage. Ask three things first: which algorithms and key lengths the system must support; which certification the end market requires, such as a FIPS 140-3 validation level or a national scheme; and how keys are stored and protected against physical and side-channel attack.
Encryption and security ICs — cryptographic coprocessors, secure elements and smart-card chips, security microcontrollers and authentication chips — supplied as chips or modules. Software cryptographic libraries, complete hardware security modules (HSMs), network encryptors and general-purpose MCUs without security certification are outside this page except where compared.
Start with your task
01
NIST's FIPS 197 specifies the Advanced Encryption Standard, based on the Rijndael block cipher selected in 2000. It defines three members — AES-128, AES-192 and AES-256 — each transforming data in 128-bit blocks, with the suffix giving the key length in bits; NIST describes block ciphers as the foundation for cryptographic services, especially those assuring data confidentiality. The current release updates the 2001 original with editorial improvements rather than technical changes to the algorithm. [1]
Editorial calculation: AES-256's key is twice as long as AES-128's (256 vs 128 bits), but every AES variant processes data in the same 128-bit (16-byte) blocks, so a 1,500-byte packet is about 94 blocks whichever key length is used. [1]
Editorial note: list every algorithm, mode and key length the system needs and ask the supplier which are in hardware and which in firmware.
Give the supplier the application, algorithms, modes and key lengths, required throughput, key storage and generation (true random number generator), certifications needed (FIPS 140-3 level, “Common Criteria”, national schemes), interface (SPI, I²C, ISO 7816, USB), supply voltage and power, operating temperature, package, secure provisioning and personalisation, software support, longevity of supply, and annual volume.
02
FIPS 140-3 sets security requirements for cryptographic modules used by US federal agencies and their contractors, modifying the requirements of ISO/IEC 19790:2012 and ISO/IEC 24759:2017. It provides four increasing, qualitative security levels and covers module specification; interfaces; roles, services and authentication; software and firmware security; operating environment; physical security; non-invasive security; sensitive security parameter management; self-tests; life-cycle assurance; and mitigation of other attacks. [2] The Cryptographic Module Validation Program (CMVP), run by NIST with the Canadian Centre for Cyber Security, validates modules through accredited independent laboratories; it has validated to FIPS 140-3 since 22 September 2020, keeps validated modules on its active list for five years (two for interim validations), and stopped accepting new FIPS 140-2 submissions from 1 April 2022. FIPS 140-2 modules could be used for new systems through 21 September 2026, after which they move to the historical list for existing systems only. [3]
Editorial note: as of this review that 21 September 2026 date has passed, so for new US or Canadian federal systems ask for a FIPS 140-3 certificate number and check it on the CMVP list, asking which firmware version and configuration the certificate covers.
03
Suppliers linked to this page list encryption or security chips; each card links to the page reviewed.
Listings include secured encryption chips within a security and identification product line that grew from smart-card chips; ask each for algorithm lists, certificates and their scope, and supply longevity.
04
Infineon's product page for the OPTIGA Trust M (SLS32AIA), a pre-provisioned discrete secure element, shows the values a chip listing should state. It lists ECC on NIST curves up to P-521 and Brainpool r1 curves up to P-512, RSA up to 2048, AES up to 256 and HMAC up to SHA-512, TLS v1.2 PRF and HKDF up to SHA-512, a TRNG/DRNG with 4 monotonic counters, up to 10 kB of user memory, an I2C interface with shielded connection and a 3 x 3 mm USON-10 package. [4]
For certification the page lists PSA level 3 and states that the chip is "Based on CC EAL 6+ (high) certified HW". Its parametric table gives ambient temperature ranges of −40 °C to 105 °C and −25 °C to 85 °C, and its feature list gives a lifetime of 20 years for industrial use. [4]
Editorial note: this is one maker's listing used as an example of what to ask for, not a recommendation. AES up to 256 covers the three FIPS 197 key lengths [1]. The certifications named on this page are CC EAL 6+ hardware and PSA level 3, not a FIPS 140-3 validation; for US or Canadian federal systems ask for a CMVP certificate number [3], and for any scheme ask whether the certificate covers the hardware only or the complete product with firmware.
| Datasheet item | OPTIGA Trust M listing | Compare with your project |
|---|---|---|
| ECC curves | NIST up to P-521; Brainpool r1 up to P-512. [4] | Curves the protocol needs. |
| RSA | Up to 2048. [4] | Required key length. |
| Symmetric and MAC | AES up to 256; HMAC up to SHA-512. [4] | AES-128/192/256 in FIPS 197. [1] |
| Certification | PSA level 3; based on CC EAL 6+ certified hardware. [4] | Scheme the market requires. |
| Memory and interface | Up to 10 kB user memory; I2C, shielded. [4] | Keys and certificates to store. |
| Temperature and lifetime | −40 °C to 105 °C or −25 °C to 85 °C; 20 years industrial. [4] | Operating environment. |
05
This is a functional reference built from the sources cited; it is not one maker's design.
| Area | Requirement | Fix in the order |
|---|---|---|
| Algorithms | AES-128/192/256, 128-bit blocks. [1] | Algorithm list. |
| Interfaces and roles | Covered by FIPS 140-3. [2] | Interface, auth. |
| Physical and non-invasive security | Covered by FIPS 140-3. [2] | Protection level. |
| Key (SSP) management | Covered by FIPS 140-3. [2] | Storage, provisioning. |
| Validation | CMVP, 5-year active list. [3] | Certificate number. |
06
An encryption chip quotation needs values for your project. The table explains each field, gives published values where a reviewed source states them, and says what to obtain from the supplier.
| Field | What it means and published values | Ask the supplier for |
|---|---|---|
| Supply voltage (V) | Not stated in reviewed sources. | Range. |
| Operating temperature (°C) | Not stated in reviewed sources. | Grade. |
| Clock frequency (MHz) | Not stated in reviewed sources. | Max clock. |
| AES throughput | AES on 128-bit blocks. [1] | Mbit/s per mode. |
| Power consumption | Not stated in reviewed sources. | Active, sleep. |
| Package type | Not stated in reviewed sources. | Package, pins. |
| Security level | FIPS 140-3 Levels 1–4. [2] | Certificate, level. |
| ESD tolerance | Not stated in reviewed sources. | HBM, CDM. |
| Data retention | Not stated in reviewed sources. | Years. |
| Write endurance | Not stated in reviewed sources. | Cycles. |
07
Paste it into your enquiry below or into an email to a maker, then replace every bracket.
Application: [comms; card; IoT; payment] Algorithms: [AES key lengths; others; modes] Certification: [FIPS 140-3 level; other schemes] Keys: [storage; TRNG; provisioning] Interface: [SPI; I²C; ISO 7816; USB] Package: [type; temperature grade] Volume: [pcs per year]
These companies list encryption or security chips.
Lists secured encryption chips in its security and identification product line.
Product scope checked 2026-10-11
Explore company information and manufacturing capabilities, then discuss the scope of your project with a relevant supplier.
FIPS 197 specifies AES-128, AES-192 and AES-256, all using 128-bit blocks. [1]
Four increasing, qualitative levels. [2]
CMVP says FIPS 140-2 modules could be used for new systems through 21 September 2026; afterwards they move to the historical list for existing systems only. [3]
Infineon's OPTIGA Trust M page, for example, lists ECC up to NIST P-521, RSA up to 2048, AES up to 256 and HMAC up to SHA-512, with PSA level 3 and CC EAL 6+ certified hardware. [4]
Sources checked 2026-10-12. All three standards sources are US NIST pages.
Ask for use case, specification boundaries, supplier type, and RFQ preparation information for this product.
Compare manufacturer profiles with relevant product and process capability.